Unless otherwise noted, all seminars will take place in the 6th floor conference room of Donald Bren Hall (DBH 6011). Refreshments will be served at 10:50am, and the seminar talks will run from 11:00am until noon.
For additional information, please contact CS Seminar Administrative Coordinator, Mare Stasik, at firstname.lastname@example.org or (949) 824-7651.
February 27, 2020
3:00pm - 4:00pm
In this seminar, I will talk about a few important challenges in the microservices era, and how we can address them in hardware/software. First, I will talk about the "Killer Microseconds" challenge, which refers to us-scale ``holes'' in CPU schedules caused by stalls to access fast I/O devices or brief idle times between requests in high throughput microservices. I will present our proposed heterogeneous server architecture, Duplexity, which employs aggressive multithreading to hide the latency of killer microseconds, without sacrificing the Quality-of-Service (QoS) of latency-sensitive microservices. Then, I will present Caper, which is an algorithmic scheduling framework to tackle the tail latency of microservices from a queuing perspective, and CaperCore, as a microarchitectural instantiation of the framework. Finally, I will conclude my talk by describing the ongoing and future directions towards designing highly efficient server architectures in the microservices era.